Performance of Double-Pole Four-Throw Double-Gate RF CMOS Switch in 45-nm Technology

Performance of Double-Pole Four-Throw Double-Gate RF CMOS Switch in 45-nm Technology

In this paper, we have investigated the design parameters of RF CMOS switch, which will be used for the wireless telecommunication systems. A double-pole four-throw double-gate radio-frequency complementary-metal-oxide-semiconductor (DP4T DG RF CMOS) switch for operating at the 1 GHz is implemented with 45-nm CMOS process technology. This proposed RF switch is capable to select the data streams...

Capacitive Model and S-Parameters of Double-Pole Four-Throw Double-Gate RF CMOS Switch

In this paper, we have analyzed the Double-Pole Four-Throw Double-Gate Radio-Frequency Complementary Metal-Oxide-Semiconductor (DP4T DG RF CMOS) switch using S-parameters for 1 GHz to 60 GHz of frequency range. DP4T DG RF CMOS switch for operation at high frequency is also analyzed with its capacitive model. The results for the development of this proposed switch include the basics of the circu...

High Isolation Single-Pole Four-Throw RF MEMS Switch Based on Series-Shunt Configuration

This paper presents a novel design of single-pole four-throw (SP4T) RF-MEMS switch employing both capacitive and ohmic switches. It is designed on high-resistivity silicon substrate and has a compact area of 1.06 mm(2). The series or ohmic switches have been designed to provide low insertion loss with good ohmic contact. The pull-in voltage for ohmic switches is calculated to be 7.19 V. Shunt o...

AN ULTRA-LOW POWER RF RECEIVER BASED ON DOUBLE- GATE CMOS (FINFET) TECHNOLOGY By

Channel thickness dependency of high-k gate dielectric based double-gate CMOS inverter

This work investigates the channel thickness dependency of high-k gate dielectric-based complementary metal-oxide-semiconductor (CMOS) inverter circuit built using a conventional double-gate metal gate oxide semiconductor field-effect transistor (DG-MOSFET). It is espied that the use of high-k dielectric as a gate oxide in n/p DG-MOSFET based CMOS inverter results in a high noise margin as well...